An embodiment relates generally to a cache system, and more specifically, to a dynamic cache correction mechanism to allow constant access to an addressable index.
A cache is a component that transparently retains data elements (or simply data) so that future requests for any retained data can be served faster. A data element that is stored within a cache corresponds to a pre-defined storage location within a computer memory system. Such data element might be a value that has recently been computed or a duplicate copy of the same storage location that is also stored elsewhere. If requested data is contained in the cache, this is a cache hit, and this request can be served by simply reading the cache, which is comparatively faster since the cache is usually built close to its requester. Otherwise, if the data is not contained in the cache, this is a cache miss, and the data has to be fetched from system memory (other storage medium) not necessarily close to the requester, and thus is comparatively slower. In general, the greater the number of requests that can be served from the cache, the faster the overall system performance becomes.
To ensure the validity of data in the cache, the data can be checked for errors. Error detection and correction schemes can be either systematic or non-systematic. In a systematic scheme, the transmitter sends the original data, and attaches a fixed number of check bits (or parity data), which are derived from the data bits by some deterministic algorithm. If only error detection is required, a receiver can simply apply the same algorithm to the received data bits and compare its output with the received check bits. If the values do not match, an error has occurred at some point.